Cotutelle PhD: Spike Sorting algorithm implementation on Hybrid FPGA/ASIC platform for next generation of Brain Computer interfaces

Project Description

Context: 
Emerging brain–computer interface (BCI) technologies aim to help individuals with disabilities recover motor or communication abilities. A key challenge in advancing these systems lies in their computational demands: current BCIs generate massive data streams, require substantial energy consumption, and often depend on centralized computing architectures that limit real-time performance and portability.
To address these limitations, we propose a novel approach based on neuromorphic computing, an artificial intelligence paradigm inspired by the brain’s architecture and dynamics. Unlike conventional digital systems, neuromorphic platforms use energy-efficient hardware and event driven algorithms that mimic neural processing. This enables fast, low power analysis of neural signals directly on small embedded devices — a capability strongly aligned with next generation BCI applications.

Project Description:
We have developed a neuromorphic spike-sorting pipeline [1] based on Locally Competitive Algorithms (LCA), referred to as NSS (Neuromorphic Spike Sorter). NSS has been validated in simulation and has demonstrated promising performance on neuromorphic hardware such as Loihi 2.
The goal of this PhD project is to enhance the capabilities of NSS by implementing it on hybrid analog–digital neuromorphic hardware. More specifically, we aim to deploy NSS on the neuromorphic platform developed at 3IT, which combines:
• Digital FPGA-based architectures offering configurability and adaptability
• Analog CMOS/memristor circuits providing exceptional energy efficiency and low-latency processing
This hybrid approach has the potential to significantly advance embedded neuromorphic processing for real-time BCI applications.

Tasks of the PhD Candidate:
The PhD candidate will be responsible for designing innovative methodologies to align neuromorphic algorithms with the physical constraints of the target hardware. This hardware–software co design effort will involve:
• Deepening and extending NSS-related machine learning and neuromorphic algorithms
• Adapting algorithms to mixed-signal and analog hardware constraints
• Developing and testing implementations on FPGA and analog neuromorphic circuits

Work environement : 
Conducted as a cotutelle between the University of Lille and the University of Sherbrooke, the project provides a unique interdisciplinary environment. The student will collaborate closely with:
• LilleAndCog neuroscience center (Lille, France) — spike sorting and neural signal processing
• 3IT / LN2 (Sherbrooke, Canada) — neuromorphic hardware and embedded AI
The candidate will also participate in the ANR Gneuro initiative, interacting with teams working on:
• Biological neuronal cultures (UGA – Grenoble)
• Microelectrode fabrication for electrophysiology (IEMN – Lille)
• Biosignal analysis and neuromorphic modeling (LilleAndCog - Lille / 3IT LN2 - Sherbrooke)

Desired Profil:
• A strong background in electrical engineering, computer engineering, or a related field
• Advanced programming and hardware testing skills in both analog and digital domains
• Experience in machine learning, neuromorphic computing, or embedded AI (asset)
• Knowledge of biotechnology or neuroscience (asset)
• Excellent communication, autonomy, and teamwork skills, essential for managing a cotutelle program
Upon completion, the candidate will receive a dual PhD degree from the University of Lille and the University of Sherbrooke.

Reference
[1] Unsupervised Sparse Coding-based Spiking Neural Network for Real-time Spike Sorting,
A. Melot, S. U. N. Wood, Y. Coffinier, P. Yger, F. Alibart, Neuromorphic and Computing Engineering, 2025.

Funding offered

To be discussed

The last update was on 30 January 2026. The University reserves the right to modify its projects without notice.